The Spark I45 delivers a flexible, high-performance platform for network-centric FPGA applications. This board, built around the Lattice ECP5 family, combines low-power operation and advanced connectivity. Ideal for developers creating custom Ethernet systems, hardware network processors, and edge computing solutions.
Note: A Lattice HW-USB-2A or other Lattice programmer is required to program the Spark I45.
Key Features
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Lattice ECP5 FPGA Core
The LFE5U-45F-6BG256C offers an optimal balance between logic resources and power efficiency. The ECP5 architecture enables efficient implementation of Ethernet MACs, custom packet engines, and timing-sensitive logic. -
8× Gigabit Ethernet Interfaces
Eight fully independent Gigabit Ethernet ports with RGMII connectivity to VSC8541XMV-02 PHYs. Each port is directly accessible to the FPGA fabric for maximum flexibility in packet processing, switching, or protocol acceleration. -
Integrated Memory Subsystem
Includes the IS61WV1288EEBLL-10TLI, an onboard 128 kB asynchronous SRAM for data management, and the MX25V1635FM1I, which has 2 MB SPI Flash for configuration storage and embedded firmware. -
Precision Clocking and Synchronization
125 MHz low-jitter reference clock with programmable PLLs to support multiple clock domains and synchronous timestamping—ideal for Time-Sensitive Networking (TSN) or PTP/IEEE 1588 applications. -
Programming and Debugging Interface
A 2x5-pin JTAG header to provide easy programming and system monitoring. -
Comprehensive Toolchain Support
Fully supported by Lattice Diamond design suites, with example projects. -
Optimized Power and Thermal Design
Efficient DC-DC regulation supports stable multi-rail operation from a single 5V input. Passive cooling ensures reliable performance for extended workloads.
Applications
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FPGA-based Ethernet switches and media converters
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Network protocol analyzers and hardware firewalls
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Edge and industrial IoT gateways
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Time-sensitive networking (TSN) and deterministic Ethernet control
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Research and education in FPGA-based networking architectures
Technical Specifications
| Feature | Description |
|---|---|
| FPGA | LFE5U-45F-6BG256C |
| Ethernet PHYs | 8 × VSC8541XMV-02 with RGMII interfaces |
| System Memory | 128 kB asynchronous SRAM IS61WV1288EEBLL-10TLI |
| Configuration Memory | 2 MB SPI Flash MX25V1635FM1I |
| Clocking | 125 MHz reference, programmable PLLs |
| Power Input | 5-12V DC Barrel Connector (included in all orders) |
| Software Tools | Lattice Diamond, example VHDL and Verilog reference projects |
| Board Size | 160 mm x 85 mm |